“Our method has been used in production to design the next generation of Google TPU,” wrote the authors of the paper, spearheaded by Google’s head of machine learning for systems, Azalia Mirhoseini.
Essentially, Google is creating AI design chips that can draw up a “floorplan” for more advanced AI systems through an intricate process that involves carefully placing components, including CPUs, GPUs and memory cores, in relative positions across a silicon die. It typically requires months of intense effort by engineers to create these floorplans, but Google’s latest AI learning system, which is equipped with a learning program trained on a dataset of 10,000 varying floorplans, can produce manufacturable layouts in a much faster timeframe.
“In under six hours, our method automatically generates chip floorplans that are superior or comparable to those produced by humans in all key metrics, including power consumption, performance and chip area,” the paper reads. “To achieve this, we pose chip floorplanning as a reinforcement learning problem, and develop an edge-based graph convolutional neural network architecture capable of learning rich and transferable representations of the chip.”
The paper notes that this new development has “major implications” for the chip industry’s advancement, allowing companies to more swiftly test potential designs and create custom chips for specified tasks.